CST 334: Week 4

 Write a 1 - 2 paragraph journal post, of at least 250 words, of what you learned this week in CST 334.

As an alternative to base-and-bounds, we learned this week that we can implement a technique called paging. This technique breaks virtual address space up into sections of equal size. In comparison to base-and-bounds, paging is simpler to implement and much more flexible in use and it allows us to avoid fragmentation. On the downside, paging needs larger data structures for translation, so more space is used, and translation info does not fit into the MMU registers, which makes paging slower than using base-and-bounds. Each process will have a page table, which logs a page frame number, or PFN, that corresponds with a virtual page number, or VPN. Virtual addresses are made up of the VPN and then what is referred to as the offset. During address translation, we retrieve the PFN using the VPN in the page table and replace the VPN in the virtual address with the PFN, and we end up with the physical address. In addition to the PFN, page tables also logs whether a transaction is valid, what type of permissions are given, if the page is already in physical memory or on disk, if the page has been modified since it has arrived in memory, and if the page has been accessed. Since paging is slower than we would like it to be, we implement translation lookaside buffers, or TLB. With TLB, we cache the page table so when a virtual page number was recently looked up, its page frame number is remembered and instead of needing to use the page table for translation, the PFN is already made available.